1. Technical Field
The present invention relates in general to the field of computers, and in particular to add-in peripheral devices. Still more particularly, the present invention relates to a method and system for initializing an add-in peripheral device without being limited to available memory in a dedicated boot memory address space.
2. Description of the Related Art
To expand the capability of a computer, peripheral devices may be added on. One method known to add on such a peripheral device is to plug the peripheral device into a physical socket on a motherboard in the computer. Once the peripheral device is plugged in, the computer learns about the existence of a Read Only Memory (ROM) that is on the peripheral device. This ROM is known as an “option ROM.” The information stored on the option ROM includes code which can initialize the peripheral device during a Power On Self Test/Basic Input Output System (POST/BIOS) initialization performed by the computer during power on or a soft start.
On many modern computer systems, particularly computer server systems, and still more particularly servers such as the xSeries™ of servers manufactured by International Business Machines (IBM), the physical sockets are on a bus that is compliant with the Peripheral Component Interconnect (PCI) specification (including the standards for PCI, PCI-X, and PCI Express). The bus is thus known as a “PCI bus.” The option ROM described above on the peripheral device that connects to the PCI bus is called a PCI ROM.
The PCI specification and xSeries™ chipset technology require that, during a POST/BIOS initialization, information in the PCI ROM from the peripheral device must be loaded into and executed from a portion of the computer's system memory address space that is set aside for add-in programs stored in the PCI ROM. This address space is traditionally between C0000hex (C0000h) and DFFFFhex (DFFFFh), and is accessible only for booting peripheral devices. The total memory space between C0000h and DFFFFh is 131,072dec bytes (128 KB).
In early computer systems, 128 KB of memory was usually sufficient to load and execute all of the PCI ROMs from all of the peripheral devices. However, modern computers, and particularly servers such as the xSeries™ manufactured by IBM, provide 4 to 6 expansion slots on a PCI bus. All of the expansion slots may be fully populated with adapter cards for multiple purposes, such as Management Processsors, Network Cards, or Input/Output (I/O) cards, including cards for devices such as a Redundant Array of Inexpensive Drives (RAID) mass storage device. Each of these adapter cards can contain up to 64 KB of BIOS or embedded code that must run in the memory address space between C0000h and DFFFFh.
It is thus apparent that, for a fully populated PCI bus, the address space allocated between C0000h and DFFFFh for add-in peripheral device PCI ROMs is not sufficient. Therefore, some of the PCI devices must either be disabled, or even physically unplugged from the PCI bus, in order to avoid an “1801 PCI Error,” which indicates that all of the space between C0000h and DFFFFh has been taken up by other PCI ROMs. If additional PCI devices attempt to boot with the C0000h and DFFFFh space full, the boot sequence for those PCI devices will likely not execute, and those new devices will not function.
What is needed, therefore, is a method and system that allows all add-in PCI devices to be configured in a computer in order to provide a full range of boot devices and booting options in a computer, without being limited by the space available in the C0000h and DFFFFh address space in the computer's system memory. Preferably, such a method and system would not require an end user to modify the computer's hardware configuration, such as physically removing PCI devices according to their memory requirements and the limited address space available for add-in devices in the computer's system memory.